【Introduction】The growing demand for wireless services not only challenges our limited spectrum resources, but also makes it difficult for radio designers to choose the right radio architecture. The right radio architecture not only provides reliable performance, but also simplifies the circuitry surrounding the radio, resulting in significant cost, power, and size reductions. In an era of ever-increasing radio deployments, a radio that meets the needs should tolerate current and future wireless coexistence that could otherwise cause a cascade of interference. This article examines two common radio architectures and compares the strengths and weaknesses of each in addressing the unique challenge of coexisting with an increasing number of radio sites.
Growing Challenges – New Wireless Neighbors
The wireless revolution started about 30 years ago when there were only a few frequency bands, and most were limited to below 900 MHz, usually one per country. As demand for wireless services grows, new frequency bands continue to be added, and there are now 49 frequency bands globally allocated for 5G NR alone, not including mmWave allocations. Most of the newer spectrum is above 2.1 GHz, with bands covering 500 MHz (n78), 775 MHz (n46), 900 MHz (n77) and up to 1200 MHz (n96).
As these new frequency bands come online, the challenge is to ensure adequate receiver performance in the presence of blocking in legacy frequency bands. This mainly comes from co-site requirements at deployment locations, using bands 2, 4 and 7 in the US and bands 1 and 3 in other regions. This is especially critical for wideband radios serving applications in n48 (CBRS) and n77 or any part of n78.
Wireless demands will continue to grow in the future, and challenges of coexistence and interference will always exist.
Radio Design with RF Protection and Selectivity
One of the main challenges in receiver design is protecting it from interfering signals. From the outset, radio engineers have sought different ways to achieve this, initially using simple and crude filtering, and later using various heterodyne techniques with distributed filtering. Over the years, the industry has developed three main architectures to address these challenges: direct conversion (zero-IF), superheterodyne (IF), and direct RF sampling. While IF sampling is popular, it is not the focus of this article. This article will focus on comparing RF sampling and zero-IF, as they are very advanced implementations in the wireless world today. Each technique introduces different engineering tradeoffs and impacts on surrounding circuitry and its requirements differently, including the method of frequency translation, the amount of RF and baseband gain, how RF mirroring is handled, and how and where filtering is implemented. Details of these tradeoffs are shown in Table 2.
Gain Distribution and Power Dissipation
There is a key difference in gain distribution between RF sampling and zero-IF. As shown in Figure 2, RF sampling places all gain in the RF domain because all frequencies in the radio remain the same when processing the signal. For comparison, Figure 1 shows a zero-IF architecture. For this architecture, part of the gain is at the RF frequency, but the balance is at baseband after frequency translation.
Figure 1. Typical Zero-IF Signal Chain
Figure 2. Typical RF Sampling Signal Chain
Both architectures require trade-offs. From a gain perspective, gain at higher frequencies requires more DC than at lower frequencies due to the need for higher slew rates, especially as the signals in the signal chain get progressively larger. This means that the RF sampling architecture consumes more power in the linear RF section (where a significant portion of the gain is at DC) compared to zero-IF. At lower frequencies, the slew rate is lower, so standby current can be reduced accordingly.
The challenge with RF sampling is the need to drive a mostly capacitive input (sampling capacitor) at high frequencies and relatively high voltages (~1 V). In contrast, the zero-IF input is a well-behaved 50 Ω (or 100 Ω) resistor that goes into the summing node of the baseband amplifier; the amplifier provides gain, eliminating the sampling node and isolating it from the RF signal, reducing the required gain provided RF driver. This has a profound effect on the power consumption of the linear RF section, as it reduces the total RF power consumption by 25% to 50% by eliminating the third RF gain stage, favoring a zero-IF architecture, and the standby current required by the baseband is less than RF amplification.
In addition to linear power consumption, there is also power consumption associated with digitization. When using a zero-IF converter, simply digitize the desired bandwidth. When RF sampling is used, not only is the wide RF bandwidth required to be digitized, but the sampling rate far exceeds the Nyquist requirement. The power consumption associated with both bandwidth and sampling rate is high. The exact power consumption depends on the process, but when implemented on the same process, RF converters consume approximately 125% more power than baseband converters for typical single-band applications. Even if the RF converter can digitize both frequency bands, the power consumption is still 40% higher.
Table 1. Gain distribution in different architectures
Images and spurious signals
These options also have secondary trade-offs. For example, zero IF introduces LO leakage and I/Q mismatch image terms, while RF sampling introduces interleaving spurs due to mismatches within the converter architecture, as well as RF harmonics in the converter and sampling-related jitter terms. The good news is that, regardless of architecture, most images and spurious signals can be resolved by various background algorithms.
The two architectures have very different frequency plans, which affect how aliasing is handled and how much RF (external) filtering must be applied. In addition to architectural spurs, all radios generate RF harmonics and suffer from aliasing. If the desired signal is naturally outside the first Nyquist zone, the RF sampling radio can downconvert the desired signal with aliasing. However, the problem is generally the response of the interfering signal, because after aliasing, it can accidentally fall on top of the desired signal. These signals must be eliminated by careful frequency planning, high rejection RF filtering, or a sufficiently high sampling rate (where no aliasing occurs). Each measure has pros and cons that need to be weighed carefully.
The zero-IF architecture converts the signal to baseband (near DC). While RF harmonics are certainly generated, they are in all cases far from baseband and are well filtered by the low-pass response of a typical zero-IF input structure (described below). Similarly, the relatively high sampling rate of the baseband sampler used and the same input structure also cause ambient aliasing.
Zero IF Filter Requirements
An easily overlooked feature of the zero-IF architecture is that the baseband input amplifier is usually constructed as an active low-pass filter that operates as an integrated analog filter, which greatly reduces the burden on the analog filter. Combined with on-chip decimation filtering, it can also be used as a programmable channel filter to remove signals that are closer than Nyquist-correlated signals. In addition, sampling devices within zero-IF receivers often include feedback to provide additional out-of-band rejection. In practice, this means that the out-of-band region of the radio has a larger full-scale range than the in-band region. As described in the AN-1354 article and shown in the simplified diagram in Figure 3, zero-IF radios are inherently tolerant of out-of-band signals. The vertical axis in Figure 3 represents the input power level that results in a 3 dB drop in sensitivity relative to in-band, which shows that in-band signals inherently have tolerance to out-of-band signals, which other architectures do not have.
Figure 3. Example of Effect of On-Chip Zero-IF Filtering
Due to this built-in filtering, the main issue becomes the protection of the RF front-end (ie LNA). For FDD and some TDDs, a typical configuration is to use a SAW filter between the first and second stage LNAs. Some TDD applications place the SAW filter after the second stage, but the second stage is bypassable under large input conditions, as shown in Figure 1. Typically, a SAW filter will provide about 25 dB of out-of-band rejection, which is assumed here. In addition to the SAW filter, the antenna side of the LNA also requires a cavity filter shared with the transmitter.
A typical LNA might have an input 1 dB compression point of –12 dBm. If the out-of-band or coexistence requirement is 16 dBm, these interfering signals must be filtered to about 10 dB (or more) below the LNA’s input 1 dB compression point. The minimum suppression is 38 dB (+16 – –12 + 10). Adding the SAW filter, the zero-IF input presents a total out-of-band rejection of 63 dB. Assuming the RF gain does not roll off, and accounting for the total filter rejection to the core radio input, the maximum out-of-band signal level will be –20 dBm. This is well below the typical full scale and is further attenuated by the on-chip filtering explained earlier. Compared to Figure 3, this input level does not cause spurious signals or sensitivity degradation.
RF Sampling Filter Requirements
There are two issues to be aware of when using RF converter architectures that require direct attention to filtering. First, any signal, regardless of the input level, can produce unwanted spurs that can occupy the same frequency as the signal of interest. Spurs related to interleaving are handled algorithmically, but architectural spurs are another issue as such spurs can be unpredictable. For many older RF converters, this is an ongoing challenge to radio performance. Fortunately, many novel converters contain some form of background perturbation, which can alleviate these problems and render relatively clean SFDR scans, as shown in Figure 4.
Figure 4. Example of Converter with Dither
Table 2. Engineering tradeoffs between architectures
In this SFDR vs. input level plot, it’s worth noting that the first 15 dB shows degradation due to slew rate limitations in the converter, which typically produce strong second and third harmonics that must be be reduced. Once the RF input is below this level, harmonics and architectural spurs are usually no longer an issue (check the converter performance to verify). For a full scale of 1 dBm, a significant reduction in spurious signals can be expected when out-of-band signals entering the converter are suppressed below -14 dBm. For a conversion gain of 50 dB, as shown in Table 2, this equates to -64 dBm for the antenna. If the input could be 16 dBm, the RF filtering needs to be 80 dB or more for no aliasing. Assuming that the SAW filter provides 25 dB, the cavity filter needs to provide 55 dB to adequately protect the RF ADC from nonlinearities due to out-of-band signals, and to protect the input of the first-stage LNA from being driven by out-of-band signals into non-linear state. This example represents a well-behaved converter, but the chosen converter’s SFDR versus input level should be carefully examined to determine if more filtering is required.
Another concern with RF converter architectures based on current commercial chips is aliasing protection. Current RF converters are based on cores operating at rates between 3 GSP and 6 GSP. At these lower rates, it is impossible to avoid the aliasing term without using high-rejection filtering to mitigate the effects of aliasing. This problem is only mitigated if the sampling rate reaches double digit GHz.
To account for the effect of aliasing on filter requirements, a simplification is to consider the protection of a single source element against the co-site requirement of 16 dBm from aliasing. The goal is to suppress the interfering signal to such an extent that aliasing to the desired RB does not affect performance; it should be filtered sufficiently to prevent any negative effects. At approximately 0 dB SNR, the signal level of the wide-area reference channel based on the G-FR1-A1-4 signal will be -118.6dBm per RB. Therefore, the nuisance signal must be reduced by 10 dB to 15 dB, or about -130 dBm, by filtering to prevent performance impact. Thus, the total rejection requirement is about 150 dB, of which the cavity filter needs to provide about 125 dB and the SAW filter provides the rest.
Figure 5 shows the cavity filter requirements for RF sampling and zero IF. Since the RF sampling architecture has two separate requirements, the most restrictive one dominates, and the achievable filter only needs to meet the most restrictive or 125 dB rejection to cover the entire frequency band. While such filtering is readily available, the downside is the large filter size. In contrast, the zero-IF architecture requires only 40 dB of rejection, a performance that can be achieved with a 4-cavity filter, resulting in significant weight and size reductions.
Figure 5. Cavity Filter Requirements
In conclusion, both the zero-IF and RF sampling architectures provide excellent capabilities. However, if the goal is to optimize cost, weight, and size, then the zero-IF architecture wins on multiple fronts. From a power consumption standpoint, a zero-IF architecture that integrates most of the analog gain offers convincing power savings. Likewise, zero IF has the potential to significantly reduce filtering requirements when the effects of filtering are considered. While the cost difference for the filters may be small, the size and weight reduction of these filters should be over 50% depending on the number of cavities required.
The Links: 6MBP50RS120 LM64K11