[Introduction]According to the research data of the Global Mobile Communication Systems Association (GSMA), the compound growth rate of the number of Internet of Things devices in the world from 2010 to 2020 is as high as 19%, reaching 12.6 billion in 2020; and by 2025, this number will climb to 24.6 billion. Although there are differences in the forecast data of other institutions, they are mostly at the level of tens of billions, and most of them believe that this process will continue to accelerate in the next ten years, moving towards a scale of hundreds of billions. Under such a general trend, the wireless interconnection market will undoubtedly usher in a sustained growth period.
To make devices “networked”, the most direct technical solution is the dual-chip architecture of “MCU+RF Module”, that is, on the basis of the Electronic application system, plus discrete wireless RF communication devices. However, according to the usual development logic of the semiconductor circle, when this market is large enough, people will think “why not integrate the MCU and the RF wireless transceiver”, so that both can be achieved on a single chip Wireless communication, and the ability to run applications, will undoubtedly be more cost-effective in terms of cost and volume. Wireless SoCs (sometimes also referred to as wireless MCUs) came into being in this context.
Wireless SoC selection elements
Today, although the wireless SoC cannot completely replace the dual-chip architecture, it has become more and more mature and the market application has become more and more extensive. But for developers, one of the challenges that come with it is: there are more and more wireless SoC products, how should you choose the one that suits you? Considering that a wireless SoC is more complex than a simple MCU architecture, there are more factors to consider, and you have to pay more attention to the selection.
According to the requirements of the application, based on a comprehensive evaluation of factors such as data transmission rate, transmission distance, power consumption, cost, network capacity, security, etc., selecting the appropriate wireless technology is usually the first step in wireless SoC selection.
Among the optional wireless technologies, short-range interconnection technologies such as Wi-Fi, Bluetooth, and Zigbee based on the 2.4GHz frequency band are currently the mainstream in the market. According to analysis, the number of connections based on such wireless protocols accounts for more than 70%. These wireless technologies are open technical standards, with high market penetration and relatively complete ecology, which are inherent advantages; but their coverage is usually less than 100 meters, and they are also facing the increasingly crowded 2.4GHz frequency band. Challenges in immunity and compatibility must be taken seriously.
Since the wireless transmission distance is inversely proportional to the frequency, if the application requires a longer distance interconnection, the sub-GHz wireless technology below 1GHz will have more advantages, and has a stronger ability to pass through walls; at the same time, the interference source is not as There are so many 2.4GHz frequency bands, which is beneficial to improve the overall performance of the system network. In this frequency range, there are many available unlicensed or licensed frequency bands to choose from (such as 433MHz, 868MHz and 915MHz), and many dedicated wireless communication protocols have also been developed on this basis. Users can make full use of these resources, flexibly and quickly deploy your own IoT architecture to meet customized application requirements.
After determining the desired wireless technology, the next step is to look at the hardware architecture of the wireless SoC. At present, mainstream wireless SoCs all adopt a dual-core architecture, that is, an Arm Cortex-M3/M4 processor core plus a Cortex-M0/M0+ core: the former is used as the main processor to run application software; the latter is used to process wireless protocol to perform RF real-time tasks, which can effectively reduce the workload of the main processor.
This “two-core separation” architecture has another advantage: the RF system in the SoC is actually “packaged” into an independent RF unit, and the Cortex-M0/M0+ core in the dual-core is generally not open to users. For developers, the entire system is like a single-core MCU, so they can focus more on application development on the Cortex-M3/M4 main processor, and the development of the entire system is simplified – and if it is A wireless SoC with a single-core architecture needs to process both the application program and the protocol stack, making the design process more complicated. Therefore, if there are no special requirements, a wireless SoC with dual-core architecture is undoubtedly a better choice.
In the application of the Internet of Things, it has become a consensus that “security issues have a veto power”, so security features must also be a must in the design of wireless SoCs.
The security of a wireless SoC can be measured from the following aspects, such as: whether it has built-in security function modules (such as hardware encryption accelerator, true random number generator, etc.); whether it adopts a CPU core with security (such as supporting Arm TrustZone kernel); whether it can provide supporting software resources, etc. Some wireless SoCs also specially configure a security co-processor to run network security-related protocols to provide stronger security performance support.
A more important point is whether wireless SoC manufacturers can integrate the above security mechanisms into a complete solution to meet the needs of security policies in practical applications, which can greatly reduce users’ resource investment in security. Moreover, if such a solution can obtain authoritative safety certification in the industry, it will even allow users to eat a “reassuring pill”.
Low power consumption
Most wireless IoT devices are power-sensitive, especially for applications like Sub-GHz, which have a wide coverage area and are difficult to maintain. Of course, they require stronger battery life and more prominent low-power consumption characteristics.
There are two strategies commonly used in wireless SoCs to address the power consumption challenge. One is more refined hierarchical management of power consumption, that is, the chip can activate/deactivate corresponding functional modules according to actual application requirements to reduce unnecessary power consumption; the other is to offload the work of the main processor to specialized coprocessors and peripherals In terms of hardware, the working time of the main processor, a power-hungry consumer, is minimized as much as possible. Of course, the adoption of more advanced processes and low-power processor architectures can also be used to optimize low-power features, thereby improving the overall power consumption performance of wireless SoCs.
Since it is called a wireless “SoC”, it means that in addition to the core processor core, memory and other computing control resources, it will also integrate a wealth of peripheral function modules. Among these peripheral modules, the key points to observe are simulation, power management, interface, timing management, etc. These peripheral resources can also reflect the differentiation of SoC products, and need to be carefully evaluated according to design requirements. For example, in applications with high requirements for signal chain processing (such as sensor systems), it is necessary to carefully review the specifications of analog functions; if more data interaction and scalability are required, focus on the configuration of interface resources. . Experienced wireless SoC suppliers usually make a good balance between these peripheral resources and cost and other factors according to the needs of the market and their own experience, define corresponding products, and obtain the greatest possible user value.
Having said so much above, how should we choose a satisfactory wireless SoC in actual work? Below we illustrate with an example.
Sub-GHz single-chip solution
The EFR32FG23Flex Gecko SoC launched by Silicon Labs is a Sub-GHz single-chip solution designed for networked smart home, security, lighting, building automation and smart metering applications. Measured by SoC elements, the performance of EFR32FG23 in all aspects is remarkable.
Figure 1: EFR32FG23 Flex Gecko Wireless SoC
(Image source: Silicon Labs)
From the perspective of chip architecture, EFR32FG23 adopts the mainstream dual-core architecture: a Cortex-M0+ core is dedicated to the work of the radio frequency subsystem; the main control processor adopts a main frequency of 80MHz, with DSP instructions and floating-point units The Cortex-M33 core can meet the design requirements of conventional IoT applications.
Figure 2: EFR32FG23 Wireless SoC System Block Diagram
(Image source: Silicon Labs)
From the perspective of wireless and radio frequency functions, the transmission distance of the EFR32FG23 based on the Sub-GHz frequency band can cover a range of more than 1 mile. Its specially optimized RF power amplifier combines high transmit power, low power consumption, and high receive sensitivity.
In terms of sensitivity, EFR32FG23 has outstanding performance. From Table 1, we can see its sensitivity value under different working conditions, which has obvious advantages compared with other similar wireless SoCs on the market. This also means that EFR32FG23 can provide users with more stable and reliable RF functions in various application scenarios.
Table 1: Sensitivity characteristics of the EFR32FG23 receiver
(Image source: Silicon Labs)
The EFR32FG23 also supports multiple modulation schemes (such as 2/4 (G)FSK, OQPSK DSSS, (G)MSK, OOK, etc.), and multiple Sub-GHz wireless protocols, including Amazon Sidewalk, mioty, wireless M-Bus , Z-Wave and other proprietary IoT networks, providing developers with a flexible, multi-protocol Sub-GHz solution.
From the power consumption performance of the RF system, the transmit power of EFR32FG23 can be as high as +20dBm, and the corresponding TX current is 85.5mA; at 868MHz, the TX current is only 13.2mA and the RX current is only 3.7mA at 10dBm power. This also provides a guarantee for the control of the overall power consumption of the wireless SoC.
Table 2: Low Power Features of the EFR32FG23 RF System
(Image source: Silicon Labs)
In terms of the overall low power consumption characteristics of the device, in addition to the optimized low power RF subsystem mentioned earlier, it can be seen from Figure 2 that the EFR32FG23 supports up to 5 levels of power management (E0 to E4) , which means that more granular on-demand power management can be implemented, making the device well suited for low-power, long-distance wireless connectivity applications. The following are typical power consumption figures at several power levels provided by Silicon Labs:
● EM0 working mode (39.0MHz): 26μA/MHz
● EM2 deep sleep mode (64kB RAM reserved and running RTC from LFXO): 1.5μA
● EM2 deep sleep mode (16kB RAM reserved and running RTC from LFRCO): 1.2μA
In addition, in terms of peripherals, the resources provided by EFR32FG23 are also extremely rich, ranging from analog, timer/counter, to communication interfaces, including low-power LCD controllers, keyboard scanners (KEYSCAN), chip temperature sensors, etc. “Intimate” function modules bring great convenience and scalability to application development.
EFR32FG23 rich peripheral resources
● Analog to Digital Converter (ADC)
– 12 bits @1Msps
– 16bit @76.9ksps
● 2× Analog Comparator (ACMP)
● 2× digital-to-analog converters (VDAC)
● Low Energy Sensor Interface (LESENSE)
● Up to 31 general-purpose I/O pins with output state retention and asynchronous interrupt function
● 8-channel DMA controller
● 12-channel Peripheral Reflection System (PRS)
● 4 16-bit timers/counters with 3 compare/capture/PWM channels
● 1 32-bit timer/counter with 3 compare/capture/PWM channels
● 32-bit real-time counter
● 24-bit low-power timer for waveform generation
● 16-bit pulse counter (asynchronous operation) (PCNT)
● 2× watchdog timer
● 3× Upgraded Universal Synchronous/Asynchronous Receiver/Transmitter (EUSART)
● 1× Universal Synchronous/Asynchronous Receiver/Transmitter (UART/SPI/SmartCard(ISO7816)/IrDA/I2S)
● 2 I2C interfaces supporting SMBus
● Integrated low-power LCD controller, supports up to 80 segments
● Keyboard scanner supports up to 6×8 matrix (KEYSCAN)
● Chip temperature sensor with +TBD/-TBD°C accuracy over temperature range
PSA-certified safety features
Among the many features of the EFR32FG23, its excellent security features are particularly impressive.
As can be seen from the system block diagram of EFR32FG23, it has a series of security features, including hardware encryption acceleration supporting mainstream encryption standards, true random number generator (TRNG), hardware root of trust-based secure boot, secure debugging, physical tampering, Securely authenticated identities, as well as Physically Unclonable Function (PUF) key management technology, minimizes the risk of IoT security breaches and intellectual property damage. At the same time, the Cortex-M33 core used in the EFR32FG23 also supports the Arm TrustZone security feature, which is also standard for next-generation security-sensitive MCUs.
Silicon Labs brings these security features together into a complete Secure Vault solution with security certifications from Arm’s PSA certification program and third-party IoT such as the ioXt Alliance. It’s no exaggeration to say that Secure Vault technology is the culmination of today’s IoT wireless SoC’s advanced hardware and software security features that simplify development, speed time-to-market and help device manufacturers develop future-proof products.
Figure 3: Secure Vault technology received Arm’s PSA Level 3 certification
(Image source: Silicon Labs)
Secure Vault’s security features include:
Safety Equipment Identification
Silicon Labs’ Factory Trust Deployment Service with optional secure programming service provides each individual silicon chip with a secure device identification certificate similar to a birth certificate during IC manufacturing, supporting post-deployment security, authenticity and Proof-based health checks. A device certificate ensures the reliability of the chip over its lifetime.
Secure key management and storage
The effectiveness of device and data access security schemes directly depends on the secrecy of the keys. With Secure Vault, keys can be encrypted and isolated from application code. Since all keys are encrypted with a PUF-generated master encryption key, virtually unlimited secure key storage is provided. The power-on signature is unique for each device, and the master key is created during the power-on phase, eliminating the need for master key storage, further reducing attack vectors.
Advanced Tamper Detection
This feature supports everything from easy-to-implement tamper-proofing of product enclosures to sophisticated tamper detection of silicon chips through voltage, frequency, and temperature manipulation. Configurable tamper response capabilities allow developers to set appropriate response actions, including interrupting, resetting or, in extreme cases, deleting keys.
It can be seen that with the blessing of the Secure Vault security function, it can not only meet the security needs of today’s IoT applications, but also fully meet the requirements of future security regulatory measures and regulations, providing a solid security line for Sub-GHz wireless devices.
Design ecology is ready
To sum up, as a member of Silicon Labs’ Series2 platform series, EFR32FG23 provides long-distance interconnection and low power consumption, as well as rich peripheral functions, and has passed Arm PSA level 3 safety certification, which can be said to be Ideal for battery powered high performance Sub-GHz wireless solutions. At the same time, EFR32FG23 supports a variety of modulation schemes and wireless protocols in terms of radio frequency, providing developers with flexible and multi-protocol Sub-GHz connection options, and has strong market adaptability and scalability on a global scale. Wireless SoC products with excellent comprehensive performance in all aspects.
It is worth mentioning that, thanks to the support of Series2 platform resources, the design ecology supporting EFR32FG23 is also ready. For example, in terms of development tools, there are already a series of products available. For example, the following FG23 868MHz to 915MHz +14dBm development kit is a compact and feature-rich development platform that supports FG23’s onboard segment LCD controller and key features such as LESENSE and pulse counter, which can accelerate developers’ devices Evaluation and prototyping process.
Figure 4: FG23 868MHz to 915MHz +14dBm Development Kit
(Image source: Silicon Labs)
Figure 5: FG23 868MHz to 915MHz +14dBm Development Kit System Block Diagram (Image source: Silicon Labs)
In a word, EFR32FG23 is not only an ideal choice for developing Sub-GHz long-distance, low-power wireless IoT applications, but also you can see the capabilities and strengths that an excellent wireless SoC should have. With such a knowledge, you must be full of confidence in the face of the future 100 billion IoT device market!
Source: Mouser Electronics
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