The EU leads the development of high-performance processors: ARM/RISC-V heterogeneous design, TSMC 6nm

The self-developed processor seems to be entering an “arms race” related to the geographic camp. According to foreign media reports, the EU-led EPI project (European Processor Initiative, European Processor Initiative) announced a clearer roadmap. The project was launched as early as the third quarter of 2017. After adding members and revising the technical draft many times, the first chip was taped out at the end of last year.

According to the previously announced information, the chip will be used in the supercomputer developed by the EU, using a heterogeneous design, the CPU part is an ARM system, and the reference solution is an iteration of the “Zeus” in the core of the Neooverese server, matching DDR5 memory, PCIe 5.0 interface, etc.

The AI ​​computing unit (vector/tensor core) is based on the RISC-V system, supports FP32, FP64, INT8, bfloat16, etc., matching HBM memory chips.

It is worth mentioning that the chip is built by TSMC’s 6nm EUV process and is expected to be completed and delivered for mass production in 2020 at the earliest.

The Links:   2MBI600VE-120 SKIIP83AC12IT1

Related Posts